Although SpaceWire is fast approaching its 20th anniversary, the requirements for equipment to test and develop new SpaceWire devices and networks continues to evolve and push the capabilities of commercial technology.
STAR-Dundee has developed a new PCI Express product, the SpaceWire PCIe Mk2, to take advantage of the higher data rates offered in newer generations of the PCIe standard. The device features three SpaceWire ports capable of operating at 400 Mbit/s link speeds, and a PCIe Gen-3 interface that enables transmitting and receiving from/to software at the maximum rate on all links concurrently.
This high throughput is achieved through improvements to the STAR-System software suite which also includes other new features to support the latest requirements for SpaceWire test and development. As well as new graphical applications providing functionality such as the ability to operate as a Remote Memory Access Protocol (RMAP) initiator, support for ARM targets and the Python scripting language is also included.
This paper describes the advancements present in the SpaceWire PCIe Mk2 board and the STAR-System software suite, which simplify test and development activities while also providing higher throughput and lower latency transmission and reception of data.

During the design and testing of SpaceWire systems, issues can arise that require the use of specialised SpaceWire test and development equipment. Interface devices, link analysers and data recorders can be used to design and prototype systems, investigate emerging issues and identify the underlying causes.

This paper focuses on several key benefits that can be provided by using the latest SpaceWire test and development equipment. Firstly, remote access to SpaceWire systems can be provided using a Gigabit Ethernet (GbE) connected SpaceWire interface device. Secondly, detailed link analysis can be performed using a USB 3.0 connected SpaceWire link analyser. Thirdly, large amounts of recorded SpaceWire traffic can be visualised and navigated using new software tools. Finally, deterministic behaviour within non-real-time environments can be provided using a hybrid software and hardware triggering system.

This paper introduces a new SpaceWire test and development product with a Gigabit Ethernet interface developed by STAR-Dundee, the SpaceWire GbE Brick. It describes the unique features of the SpaceWire GbE Brick which make it ideal for both remote use in a test chamber and when connected directly to a PC using an Ethernet cable. The paper also characterises the performance of the SpaceWire GbE Brick and compares the performance to SpaceWire devices with PCI and USB interfaces.

SpaceVPX (VITA 78.0) is built on the ruggedized VPX standard. It addresses the need for redundancy in spaceflight systems and focusses on conduction cooled racks. SpaceVPX replaces the VMEbus control-plane of VPX with SpaceWire, while retaining the versatility of a user defined data plane serial interconnect. SpaceVPX-Lite (VITA 78.1) reduces the size and complexity of SpaceVPX. This paper describes a SpaceVPX-Lite board which uses SpaceWire and/or SpaceFibre for its backplane connections. The architecture of board is described along with its configuration options. An example application of the board as a wideband spectrometer is then described.

For those responsible for testing SpaceWire equipment it is essential to be able to capture and view the traffic on a SpaceWire link in order to help validate the link is operating correctly and debug the link should any unexpected behavior be observed. The SpaceWire Link Analyser Mk3 and SpaceWire Recorder are two items of test equipment capable of transparently capturing large quantities of SpaceWire traffic on up to four links. New software written for these units displays the captured traffic in a variety of views that allow it to be examined in different levels of detail. This paper describes the hardware and software capabilities of the SpaceWire Link Analyser Mk3 and SpaceWire Recorder and provides descriptions and examples of some of the ways these can be used to perform SpaceWire link analysis.

SpaceWire-D is an extension to the SpaceWire protocol that provides deterministic capabilities over existing SpaceWire equipment. The network is divided into segments using a virtual bus abstraction, where a virtual bus consists of a single RMAP initiator, one or more RMAP targets and the SpaceWire links that make up the paths between the initiator and the targets. Time-codes are broadcast periodically to provide time-division multiplexing, and a network schedule is defined by the allocation of virtual buses to time-slots. If a virtual bus has been allocated a time-slot, it is allowed to execute transactions to any of the targets within the virtual bus as long as the transactions complete their execution before the end of the time-slot. If the schedule is designed so that no virtual buses sharing a link are allocated the same time-slot, packets are no longer affected by blocking which allows the transaction execution times to be calculated and real-time constraints to be satisfied. The SpaceWire-D demonstration system has been designed to facilitate the verification of the draft standard. It consists of two RMAP initiators, twelve RMAP targets, a network manager device, a host PC and a routed SpaceWire network to connect the devices together. The LEON2-FT based initiator boards each contain an embedded SpaceWire-D software layer and an automated test scripting system, built on top of the RTEMS real-time operating system. The target boards respond to RMAP commands and provide event notification functionality on the backplane to allow for network activity monitoring. The network manager receives statistics and error information at the end of each schedule epoch, reported by the initiators, and informs the host PC so that it can be read, parsed and displayed to the user. Finally, the host PC runs a suite of software programs to configure, control and monitor the other devices in the demonstration system. This paper provides an overview of the SpaceWire-D protocol and describes the design and features of the SpaceWire-D demonstration system.

STAR-Dundee recently released a number of new SpaceWire test and development products based on a single hardware platform and supported by a single software platform. This paper will describe the modular design that makes this possible and the advantages, both to STAR-Dundee and to users, of this system.

SpaceWire is a spacecraft on-board data-handling network which connects instruments to the mass-memory, data processors and control processors, which is already in orbit or being designed into more than 100 spacecraft. SpaceFibre is a new, multi-Gbits/s, on-board network technology, which runs over both electrical and fibre-optic cables. SpaceFibre is capable of fulfilling a wide range of spacecraft on-board communications applications because of its inbuilt quality of service (QoS) and fault detection, isolation and recovery (FDIR) capabilities.

The Microsemi RTG4 is a new generation radiation tolerant FPGA. It has extensive logic, memory, DSP blocks, and IO capabilities and is inherently radiation tolerant, having triple mode redundancy built in. The RTG4 has a flash configuration memory built into the device. In addition the FPGA incorporates 16 SpaceWire clock-data recovery circuits and 24 multi-Gbits/s SerDes lanes to support high-speed serial protocols like SpaceFibre.

STAR-Dundee has implemented SpaceWire and SpaceFibre IP cores using the Microsemi RTG4 Development Kit. The flight proven SpaceWire IP core was initially run at over 200 Mbits/s and the SpaceFibre IP core at 2.5 Gbits/s. With a little more work it is expected to reach 300 Mbits/s and 3.125 Mbits/s respectively. The SpaceWire IP core takes around 1% of the FPGA and the SpaceFibre IP core around 3-5% depending on the number of virtual channels supported. The use of the RTG4 with the SpaceWire and SpaceFibre IP cores provides a powerful platform for future spacecraft on-board instrument control, data-handling, and data processing. Furthermore the advanced QoS and FDIR capabilities of SpaceFibre make it suitable for a wider range of spacecraft onboard applications including integrated payload data-handling and attitude and orbit control networks and launcher applications where deterministic data delivery is required.

This paper reports on the implementation and testing of the SpaceWire and SpaceFibre IP cores in the Microsemi RTG4 FPGA.

SpaceWire is a data-handling network for use on-board spacecraft, which connects together instruments, mass-memory, processors, downlink telemetry, and other on-board sub-systems [1]. SpaceWire is simple to implement and has some specific characteristics that help it support data-handling applications in space: high-speed, low-power, simplicity, relatively low implementation cost, and architectural flexibility making it ideal for many space missions. SpaceWire provides high-speed (2 Mbits/s to 200 Mbits/s), bi-directional, full-duplex data-links, which connect together SpaceWire enabled equipment. Data-handling networks can be built to suit particular applications using point-to-point data-links and routing switches.

Since the SpaceWire standard was published in January 2003, it has been adopted by ESA, NASA, JAXA and RosCosmos for many missions and is being widely used on scientific, Earth observation, commercial and other spacecraft. High-profile missions using SpaceWire include: Gaia, ExoMars rover, Bepi-Colombo, James Webb Space Telescope, GOES-R, Lunar Reconnaissance Orbiter and Astro-H.

The development and testing of the SpaceWire links and networks used on these and many other spacecraft currently under development, requires a comprehensive array of test equipment. In this paper the requirements for test equipment fulfilling key test functions are outlined and then equipment that meets these requirements is described. Finally the all-important software that operates with the test equipment is introduced.

SpaceWire-D is a protocol that provides deterministic data delivery over an existing SpaceWire network [1]. It allows SpaceWire networks to be used for time-critical avionics control applications and for asynchronous payload data handling.

SpaceWire-D uses the SpaceWire Remote Memory Access Protocol (RMAP) [2] to provide the basic communication mechanism: transactions that can read or write to memory in a remote target node. These transactions are executed by an initiator, with the initiator sending the RMAP command, a target receiving, executing and replying to the command, and the initiator receiving the reply from the target, which contains any data read from the target or is an acknowledgement to a write command.

To provide determinism the network bandwidth is split into a series of time-slots. One or more initiators are allowed to send a group of transactions in a particular time-slot, provided that transactions from different initiators do not use the same network resources, i.e. common SpaceWire links on the paths from the initiators to the target devices being accessed. The group of transactions executed in a particular time-slot must complete before the end of the time-slot, or a fault will be signalled. This restriction avoids a group of transactions from disrupting the transactions in the next time-slot, if they were to overrun their time-slot.

To support the validation and debugging of complete SpaceWire systems, STAR-Dundee Ltd have developed a SpaceWire Recorder. Using STAR-Dundee SpaceWire technology and the latest solid state data storage technology, the SpaceWire Recorder is capable of unobtrusively recording traffic on up to four links in both directions at a maximum aggregate data rate of 600Mbit/s. The maximum amount of data that can be recorded is limited only by the size of the solid state disks used. A Traffic Viewer software application provides a simple means of operating the recorder, as well as displaying and managing the large volume of SpaceWire traffic that can be recorded.

SpaceWire-D is a deterministic extension to the SpaceWire protocol designed to satisfy hard real-time constraints on a SpaceWire network. This allows a single SpaceWire network to be used for both control applications and payload data-handling. The Atmel AT6981 Castor device is a LEON2-FT based system-on-chip with multiple integrated peripherals including an eight-port SpaceWire router and three internal SpaceWire engines each containing three DMA channels, an RMAP initiator, and an RMAP target. This paper describes the SpaceWire-D protocol; the design of RTEMS networking software to test the protocol using the AT6981 system-on-chip; and the results of those tests.

The STAR-Dundee SpaceWire Physical Layer Tester (SPLT) features hardware which enables it to perform tests across the SpaceWire standard from the physical and signal layer right up to the network and protocol layer. By incorporating components from other established STAR-Dundee products, including the Link Analyser Mk2 and Conformance Tester, the SPLT is the perfect tool that can be used throughout all stages of SpaceWire development from planning requirements through to production testing of flight components.

The original STAR-Dundee SpaceWire-USB Brick has provided a simple yet powerful interface to SpaceWire networks for a number of years. STAR-Dundee's SpaceWire Brick Mk3 provides all the features of the original Brick, but with better performance, better software, better documentation and the same high quality support. It will replace the Brick with a product which can be used to very easily perform numerous SpaceWire test and development activities, and at very high speeds.

To support customers using the National Instruments LabVIEW software development environment, STAR-Dundee Ltd. have developed LabVIEW libraries and drivers allowing for the rapid integration of STAR-Dundee SpaceWire interface devices into EGSE or test and verification applications. Customers familiar with STAR-Dundee's STAR-System API suite can use a wrapper library to control and configure any supported SpaceWire interface device under the Windows operating system. Using a native LabVIEW NI-VISA driver, users can interface to STAR-Dundee SpaceWire PCI and cPCI, boards on any platform supported by LabVIEW, including National Instruments real-time targets. In this paper, the LabVIEW solutions provided by STAR-Dundee are described, including an overview of the APIs, and example usage demonstrating solutions to common tasks.

The Atmel AT6981 is a complex system-on-chip based on a SPARC LEON2-FT core, and which provides a number of peripheral devices including three multi-function SpaceWire engines and a router. The RTEMS real-time operating system is widely used in spacecraft systems in many roles. Its long history and open source availability make it an ideal choice for many applications. RTEMS has already been ported to many platforms, including some based on the SPARC LEON2 processor. The process of porting RTEMS to the AT6981 is described, and the performance, both for general data processing and for SpaceWire traffic handling, is examined.

CASTOR is a new radiation tolerant SPARC V8 processor chip which is currently being developed by Atmel in partnership with STAR-Dundee. The chip is implemented on a 90 nm radiation tolerant process which will deliver an expected processor clock speed of 200 MHz. The CASTOR chip is targeted at data processing and instrument control applications, and will deliver functional improvements over previous SPARC processors. The chip has eight SpaceWire interfaces running at 200 MBits/s, a CAN bus interface and IEEE 1553 bus interface.

At the core of the CASTOR chip is a number of dedicated high performance SpaceWire Remote Memory Access Protocol (RMAP) and Direct Memory Access (DMA) engine’s connected to the SpaceWire interfaces through a SpaceWire router. Each SpaceWire engine is capable of acting as an RMAP target, RMAP initiator or as a general purpose SpaceWire packet transmitter and receiver between the SpaceWire network and packet data defined in internal memory. Dedicated SpaceWire DMA channels are used to ensure software involvement in SpaceWire packet generation and reception is kept to a minimum. The SpaceWire interfaces support the SpaceWire-D protocol used for guaranteed latency and deterministic packet delivery. In conjunction with the RMAP initiator the chip can rapidly be configured as a highly capable SpaceWire-D initiator.

The chip can act as an RMAP target, initiator or both. The RMAP target provides a mechanism to allow remote access to the internal memory space. Two modes of operation are supported to allow direct access to a pre-defined area of memory or controlled access using authorisation by software. The RMAP initiator uses information stored in internal memory by the application software to access remote memory in equipment connected to the SpaceWire network. The engine is capable of initiating a number of RMAP transfers from remote memory, either writing data from internal memory to a remote memory location or receiving data from a remote memory location and writing it to internal memory, then interrupting the host when all transactions are complete.

The DMA channels allow the application software to send and receive data packets using data structures defined in internal memory. Each SpaceWire engine has a number of DMA channels which can operate independently of each other.

The STAR-Dundee SpaceWire Link Analyser Mk2 is a key piece of equipment when performing test, validation and verification of a SpaceWire [1] system. The analyser sits between two SpaceWire devices and monitors traffic in both directions of the link providing the user with the functionality to monitor, record and analyse SpaceWire traffic. The new features of the SpaceWire Link Analyser Mk2 make it an invaluable tool when testing, debugging, validating or verifying any type of SpaceWire equipment.

The SpaceWire Electronic Ground Support Equipment (EGSE) is a STAR-Dundee product [1] designed to simulate and stimulate SpaceWire devices. It provides a means of generating user defined packets in pre-defined sequences at specific times and data rates. The SpaceWire EGSE is configured using a script that is compiled and loaded onto the SpaceWire EGSE unit. Once configured, the EGSE can generate complex SpaceWire packet sequences without further interaction from host PC software.

Real-time SpaceWire Electronic Ground Support Equipment can be implemented easily with the SpaceWire-EGSE unit, avoiding the need for complex and expensive, real-time software development.

STAR-Dundee have previously reported on test equipment which is capable of testing the Network, Packet, Exchange, Character and parts of the Signal level of the SpaceWire standard. This paper introduces the SpaceWire Physical Layer Tester (SPLT), which is a new tool designed to test, validate and verify a SpaceWire system across all levels covered by the SpaceWire standard.

Two SpaceWire ports on the SPLT employ a special LVDS interface which allows the transmitted signals to be deliberately and measurably manipulated to test the capability of a unit under test (UUT) to receive signals of varying quality. The SPLT SpaceWire drivers offer full, independent control of voltage offset and amplitude for data and strobe pairs. Skew can be introduced both in-pair and between data-strobe pairs. Slew rates can be individually configured on each half of the differential pairs. To facilitate acquisition of an eye-diagram, the signal received on the termination resistors on these ports is buffered on external connectors to allow easy interfacing to an oscilloscope. This allows a comprehensive suite of tests to be performed through the UUT SpaceWire port without the need to open the unit.

In addition to the LVDS interface, the SPLT also implements many of the capabilities of existing STAR-Dundee devices: Link Analyser Mk2, Conformance Tester and USB Brick in addition to the packet generator and checker capabilities of the newly announced SpaceWire EGSE. A pair of Gigabit Ethernet ports and a USB 2.0 port in addition to an API allow for great flexibility in interfacing the SPLT to existing test environments. The device is rack mountable in a 1U, half width format.