SpaceFibre IP Cores for Fast Adoption of Next-Gen FPGA Communication Architectures 860.98 KB
SpaceFibre is an advanced spacecraft on-board data-handling network technology, building upon its predecessor, SpaceWire, to meet the increasing demands for higher data transfer rates and improved reliability in space applications. This open standard (ECSS-E-ST-50-11C), promoted by the European Space Agency (ESA), has been integrated into numerous spacecraft standards including SpaceVPX, SpaceVNX+, and ADHA. SpaceFibre’s built-in quality of service (QoS) and fault detection, isolation, and recovery (FDIR) capabilities ensure high reliability and availability – critical for spacecraft operations. It operates over both copper and fibre-optic cables and supports any number of lanes (up to 16) in multi-lane mode, allowing links with different numbers of lanes to seamlessly interoperate and providing rates exceeding 50 Gbit/s in existing space-qualified technology, and soon 200 Gbit/s. Its network architecture supports virtual networks and arbitrary packet sizes, enhancing the scalability and flexibility of spacecraft data systems. Simple nodes can achieve maximum throughput since SpaceFibre is designed to operate without the need for CPU intervention. Additionally, it maintains backwards compatibility with SpaceWire at the network level, facilitating integration with existing systems. Capable of running on up to 100 meters over fibre optics and inherently designed to handle high data volumes from sophisticated payloads, SpaceFibre is a critical technology for existing and future spacecraft communication architectures.
STAR-Dundee has developed a comprehensive suite of SpaceFibre IP cores, consisting of the Single-Lane Interface, Multi-Lane Interface, and Routing Switch. Optimized for space applications, these cores target existing space-qualified FPGAs for improved footprint and speed. This paper presents recent updates to these IP cores. It analyzes their performance using metrics such as maximum lane rates and resource usage, and provides the latest results on heavy-ion radiation testing. Support has been added for new radiation-tolerant FPGAs, including Frontgrade CertusPro-NX-RT, Microchip RT-PolarFire SoC, AMD Versal, and NanoXplore NG-Ultra. A novel and significant architectural improvement is the encapsulation of all transceiver logic within a single block. This simplifies user interaction by requiring only a minimal interface between the transceivers of supported FPGAs and the SpaceFibre IP. This design enables easy setup for various architectures via a configuration file, streamlining integration and reducing complexity.
The SpaceFibre IP cores presented have achieved TRL-9, having been deployed in at least six operational missions since 2021 and currently being designed into more than 60 spacecraft. The paper will demonstrate that the IP cores enable efficient and reliable data handling and processing, which is essential for mission success.