CASTOR is a new radiation tolerant SPARC V8 processor chip which is currently being developed by Atmel in partnership with STAR-Dundee. The chip is implemented on a 90 nm radiation tolerant process which will deliver an expected processor clock speed of 200 MHz. The CASTOR chip is targeted at data processing and instrument control applications, and will deliver functional improvements over previous SPARC processors. The chip has eight SpaceWire interfaces running at 200 MBits/s, a CAN bus interface and IEEE 1553 bus interface.

At the core of the CASTOR chip is a number of dedicated high performance SpaceWire Remote Memory Access Protocol (RMAP) and Direct Memory Access (DMA) engine’s connected to the SpaceWire interfaces through a SpaceWire router. Each SpaceWire engine is capable of acting as an RMAP target, RMAP initiator or as a general purpose SpaceWire packet transmitter and receiver between the SpaceWire network and packet data defined in internal memory. Dedicated SpaceWire DMA channels are used to ensure software involvement in SpaceWire packet generation and reception is kept to a minimum. The SpaceWire interfaces support the SpaceWire-D protocol used for guaranteed latency and deterministic packet delivery. In conjunction with the RMAP initiator the chip can rapidly be configured as a highly capable SpaceWire-D initiator.

The chip can act as an RMAP target, initiator or both. The RMAP target provides a mechanism to allow remote access to the internal memory space. Two modes of operation are supported to allow direct access to a pre-defined area of memory or controlled access using authorisation by software. The RMAP initiator uses information stored in internal memory by the application software to access remote memory in equipment connected to the SpaceWire network. The engine is capable of initiating a number of RMAP transfers from remote memory, either writing data from internal memory to a remote memory location or receiving data from a remote memory location and writing it to internal memory, then interrupting the host when all transactions are complete.

The DMA channels allow the application software to send and receive data packets using data structures defined in internal memory. Each SpaceWire engine has a number of DMA channels which can operate independently of each other.